| 摘要 |
PROBLEM TO BE SOLVED: To obtain a structure of high withstand voltage, low ON-resistance and low gate threshold voltage, by forming a silicon carbide thin film in a groove side surface in a groove gate type power MOSFET. SOLUTION: An MOSFET is formed by forming an n-type thin film semiconductor layer 8 in a side surface of a groove 7. It is constituted so that a p-n junction between an n<-> -type epitaxial layer 2 and a p-type epitaxial layer 3 causes avalanche breakdown before punch-through of an n-type thin film semiconductor layer 8 when a reverse bias voltage is applied. Concretely, when p-type polysilicon is used for a gate electrode layer 10, a film thickness X (μm) and an impurity concentration N (cm<-3> ) of the n-type thin film semiconductor layer 8 are set to satisfy relationship of Y<-10000 X-0.6)+0.3(logN-15)} to an aimed withstand voltage Y(V), and when n-type polysilicon is used for the gate electrode layer 10, they are set to satisfy relationship of Y<-10000 (X-0.6)+0.3 logN-15)}.
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