SEMICONDUCTOR MEMORY

摘要

PROBLEM TO BE SOLVED: To speed up a memory access time by shortening a required time at the time of making a bit line equalize OFF. SOLUTION: In respective submats SMs, equalize control lines BLEQs to be shared in all sense amplifiers SAs being in sense amplifier banks 12 of respective columns are connected to first equalize control line drivers which are provided at left ends of the submats and are consisting of P type MOS transistors and to second equalize control line drivers 32 which are dispersedly provided in cross areas 16 of the respective columns where equalize control lines pass and are consisting of plural N type MOS transistors. The first equalize control line drivers drive the equalize control lines to potentials of an H level in order to turn equalizes of bit pairs to the respective sense amplifiers ON and drive the equalize control lines to potentials of an L level in order to turn equalizes of the second equalize control line drivers OFF. The first and second equalize control line drivers operate complementarily.