发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a noise removal circuit in which optimum delay quantity for removing noise can independently be set and which is stable for the dispersion of a process and superior in reliability by independently providing a downward noise absorption circuit and an upward noise absorption circuit through the use of a logic delay circuit. SOLUTION: The downward noise absorption circuit 1 and the upward noise absorption circuit 2 are regular logic delay circuits and delay quantity can be set to optimum one in relation to the pulse width of a noise pulse to be removed by setting the capacity values of the capacitors 1c and 2c. A waveform shaping circuit constituted of FETs Q1-Q4 inputs the outputs of the noise absorption circuit 1 and the noise absorption circuit 2. When both outputs logically match, output corresponding to the logic is outputted. When both outputs are not logically matched, the output is made to be high impedance. When output is high impedance, the level is kept by a latch circuit constituted of inverters 8 and 9.
申请公布号 JPH10294652(A) 申请公布日期 1998.11.04
申请号 JP19970101405 申请日期 1997.04.18
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ABE WATARU
分类号 H03K19/003;H03K5/1252;H03K19/0175 主分类号 H03K19/003
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