发明名称 Method for fabricating isolating regions for buried conductors
摘要 Although the spacers are formed on the sidewalls of gate electrode and words lines via the same steps of deposition and etch-back processes, only the spacers disposed at the sidewalls of the gate electrode are practical for fabricating peripheral devices with LDD structure, and such fabrication is impractical in the memory cell region. On the contrary, the region beneath the spacers disposed at the sidewalls of word lines will become the path through which leakage current flows. The present invention makes use a shielding layer to cover the second active region as a masking, and then removes the spacers disposed at the sidewalls of word lines. Afterwards, isolating regions are formed through one implantation procedure to thereby decrease leakage current and simplify the process flow.
申请公布号 US5830772(A) 申请公布日期 1998.11.03
申请号 US19950526073 申请日期 1995.09.08
申请人 UNITED MICROELECTRONICSCORP. 发明人 TSENG, CHE-PIN;YEH, NAI-JEN;CHUANG, YU-CHIH;KUNG, CHENG-CHIH
分类号 H01L21/761;H01L21/8246;(IPC1-7):H01L21/44;H01L21/76;H01L21/824 主分类号 H01L21/761
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