发明名称 Electrically erasable programmable read-only memory with threshold value controller for data programming and method of programming the same
摘要 A NAND cell type electrically erasable programmable read-only memory has a memory array section containing NAND cell units. Each NAND cell unit has a series array of floating gate type metal-oxide semiconductor field effect transistors as memory cell transistors. The memory section is associated with a control-gate controller, a data-latch circuit, a sense amplifier section, and a data comparator, which is connected via an output buffer to a verify-termination detector. When a data is once written into a selected memory cell in a data programming mode, a specific basing voltage is applied to the selected cell so that the actual electrical data write condition of the selected memory cell is verified. If the comparator detects that the verified write condition is dissatisfied, data-rewriting operations are repeatedly executed by additionally supplied the selected cell with a suitable voltage which compensates for the dissatisfaction of the verified write condition in the selected memory cell transistor.
申请公布号 US5831903(A) 申请公布日期 1998.11.03
申请号 US19970868138 申请日期 1997.06.03
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OHUCHI, KAZUNORI;TANAKA, TOMOHARU;IWATA, YOSHIHISA;ITOH, YASUO;MOMODOMI, MASAKI;MASUOKA, FUJIO
分类号 G11C17/00;G11C16/02;G11C16/04;G11C16/10;G11C16/26;G11C16/34;G11C29/00;G11C29/12;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/06 主分类号 G11C17/00
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