发明名称 Delay difference adjustment circuit and phase adjuster
摘要 There is provided an adjustment circuit which delays a first and a second signal by a desired delay. After the first and the second signal are inputted to the adjustment circuit via a first and a second signal line, respectively, the first and the second signal are exchanged and are inputted via the second and the first signal line, respectively. A detection circuit receives the first and the second signal from the adjustment circuit, and detects the phase differences of these signals, before and after the exchange. The holding circuit holds a first phase difference detected by the detection circuit before the exchange, and holds a second phase difference detected by the detection circuit after the exchange. When the holding circuit holds the first and the second phase difference, a comparison circuit compares these phase differences. A counter counts in accordance with the comparison results of the comparison circuit, and sets the desired delay of the adjustment circuit. <IMAGE>
申请公布号 EP0847139(A3) 申请公布日期 1998.10.28
申请号 EP19970121441 申请日期 1997.12.05
申请人 NEC CORPORATION 发明人 KOBAYASHI, NAOKI
分类号 G01R31/319;G01R31/3193;H03L7/081 主分类号 G01R31/319
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