VECTOR PROCESSOR

摘要

For a set of addresses of list vectors output from an address buffer, a coincidence between the set and another set and a coincidence between the set and a set of addresses of preceding accesses held in preceding address holding registers in an address coincidence detector are detected by address comparator circuits in the address coincidence detector. Information from the address coincidence detector is held in a coincidence information holding circuit and output to a controller and a bank manager. The bank manager estimates possibility of occurrence of bank conflict. The controller controls a crossbar and selectors such that accesses having coincident addresses are omitted and only requests having addresses which are not coincident are sent to a storage. A data switch circuit includes preceding data holding registers respectively corresponding to preceding address holding registers and selects data corresponding to the omitted accesses from the preceding data holding registers on the basis of address coincidence information held in the coincidence information holding circuit.