| 摘要 |
A pipeline which allows one or more Through cycles to be assigned to pipeline stages is so constituted that a stage in which a data process is executed does not remain in a fixed position but shifts to an arbitrary stage. Consequently, even when a plurality of instructions to perform a plurality of data processes having a data-dependent relationship therebetween are issued simultaneously to a plurality of pipeline data processing circuits, the antecedent one of the data processes on which the subsequent one of the data processes is data-dependent is executed first by the pipeline processing circuit in charge of the antecedent data process and, at a point of time one cycle after the execution of the antecedent data process, the subsequent data process which is data-dependent on the antecedent data process is executed by the pipeline data processing circuit in charge of the subsequent data process. As a result, a large number of consecutive instructions can be issued without stagnation, so that a plurality of data processes having a data-dependent relationship therebetween can be executed at high speed.
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