发明名称 |
System and method for resolving contention arising from execution of cache coherency operations in a multiple cache computer system |
摘要 |
A data processing system and method having a number of cache controllers coupled to a bus. A cache controller uses a buffer operably coupled to the bus for loading information from the bus. A status bit associated with a buffer indicates the buffer status. The cache controller has logic circuitry operably coupled to the bus and the buffer. The logic circuitry responds to a certain cache coherency operation by loading the buffer and waiting during a predetermined interval for a possible retry signal before further processing the operation.
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申请公布号 |
US5822765(A) |
申请公布日期 |
1998.10.13 |
申请号 |
US19950572824 |
申请日期 |
1995.12.14 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BOATRIGHT, BRYAN DAVID;FEISTE, KURT ALAN;MERKEL, LAWRENCE JOSEPH;WILLIAMS, DEREK EDWARD |
分类号 |
G06F12/08;(IPC1-7):G06F13/376 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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