发明名称 DIGITAL FREQUENCY SYNTHESIZER SYSTEM AND METHOD
摘要 <p>A frequency synthesizer includes a first counter (1) for counting cycles of an input clock (12) and for generating a reference output bus (14), a VCO (3) for generating an output signal (33), a second counter (4) for counting cycles of the output signal (33) and for generating a VCO output bus (44), and a phase detector (7, 62, 72) for measuring the phase error between the reference bus (14) and the VCO output bus (44) and for generating a control signal (623) which is applied to the control input of the VCO (3). The phase detector (7, 62, 72) includes circuitry (7, 72) for computing a corrected bus (74) by multiplying the VCO output bus (44) with a correction coefficient (723) proportional to the reciprocal of the modul count of the second counter (4).</p>
申请公布号 WO1998044632(A1) 申请公布日期 1998.10.08
申请号 IL1998000152 申请日期 1998.03.30
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