发明名称
摘要 PURPOSE:To eliminate a deviation in layout density by a plurality of active region lines arranged and deviated by 1/3 pitch in X-axis direction, by forming each bit line contact co-owned by two transistors in two regions perpendicular to a plurality of word lines and by connecting them through capacitors on diagonal lines. CONSTITUTION:Two rows of active regions arranged in X-axis direction at a predetermined intervals on a semiconductor substrate is deviated by 1/3 interval respectively and a plurality of lines are also arranged in Y-axis direction. Also, two transistors are formed at two portions perpendicular to the word line 1. In addition, a bit line contact 6 commonly possessed by two transistors is formed. Also, a transistor formed on one side of active region 2 is connected to a transistor arranged the closest to the Y-axis direction above the transistors via capacitor 3 erected on a diagonal line from X-axis to Y-axis.
申请公布号 JP2806676(B2) 申请公布日期 1998.09.30
申请号 JP19920031894 申请日期 1992.02.19
申请人 发明人
分类号 H01L27/04;H01L21/822;H01L21/8242;H01L27/10;H01L27/108 主分类号 H01L27/04
代理机构 代理人
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