发明名称 Improved stress relief matrix for integrated circuit packaging
摘要 An integrated circuit package (10, 40) may comprise an integrated circuit chip (12, 42) and a substrate (14, 44) opposite the chip (12, 42). A connector (20, 52) may be disposed between the chip (12, 42) and the substrate (14, 44) to electrically couple the chip (12, 42) and the substrate (14, 44) . A matrix (24, 50) may be disposed about the connector (20, 52). The matrix (24, 50) may comprise a blend of liquid crystal polymer and thermoplastic polymer. The matrix (24, 50) may have a coefficient of thermal expansion in a direction (26, 56) substantially parallel to the chip (12, 42) and the substrate (14, 44) that is greater than that of the chip (12, 42) and that is less than that of the substrate (14, 44) in the substantially parallel direction (26, 56). In a direction (28, 58) normal to the substantially parallel direction (26, 56), the matrix (24, 50) may have a coefficient of thermal expansion that is approximately that of the connector (20, 52). <IMAGE>
申请公布号 SG53123(A1) 申请公布日期 1998.09.28
申请号 SG19970004016 申请日期 1997.11.11
申请人 TEXAS INSTRUMENTS INCORPORATED. 发明人 JACOBS, ELIZABETH, G.;HEINEN, KATHERINE, G.
分类号 H01L21/60;H01L21/56;H01L23/373;(IPC1-7):H01L21/56 主分类号 H01L21/60
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