发明名称 SEQUENCER
摘要 PROBLEM TO BE SOLVED: To provide a sequencer capable of executing the simulation of an application program by a simple and inexpensive simulation device. SOLUTION: In this sequencer 1 provided with a CPU 1A, a memory 1B, an I/O part 1C, a transmission part 1D and a base clock generator 1E, etc., a clock extension means 1F by frequency division or the like, a time extension magnification part 1G for a normal operation, the time extension magnification part 1H for the simulation and a time extension magnification selection means 1I are additionally provided. A magnification (×1) is selected at the time of the normal operation, the magnification (×N) is selected at the time of the simulation and they are imparted to the clock extension means 1F. Both time extension magnification parts 1G and 1H are provided in the internal memory of the sequencer 1 and the magnification is easily changed by a loader of from the outside. Thus, the cycle of base clocks to be the reference of the operation of a time element is extended for the time extension magnification and time extension is realized without changing a program.
申请公布号 JPH10254510(A) 申请公布日期 1998.09.25
申请号 JP19970052648 申请日期 1997.03.07
申请人 MEIDENSHA CORP 发明人 SATO HIROKI
分类号 G05B17/02;G05B19/048;G05B19/05;(IPC1-7):G05B19/048 主分类号 G05B17/02
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