发明名称
摘要 <p>In a semiconductor memory device including a memory cell array, a sense amplifier for sensing a voltage of a selected one of read-only memory cells of the memory cell array, a dummy memory cell array, a reference voltage generating circuit for sensing a voltage at the output of the dummy memory cell array, and a comparator for comparing a sense voltage of the sense amplifier with a reference voltage of the reference voltage generating circuit, a bias circuit supplies a bias current from a power supply terminal to the output of the sense amplifier and also supplies a bias current from the power supply terminal to the output of the reference voltage generating circuit.</p>
申请公布号 JP2800740(B2) 申请公布日期 1998.09.21
申请号 JP19950274843 申请日期 1995.09.28
申请人 发明人
分类号 G11C17/00;G11C5/14;G11C7/06;G11C16/04;G11C16/06;(IPC1-7):G11C16/04 主分类号 G11C17/00
代理机构 代理人
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