| 摘要 |
Frequency-dividing ratio data for selecting the oscillating frequency of a synthesizer are generated by a shift register, a certain number of switches connected to respective output terminals of the shift register, and an exclusive-OR gate for exclusive-ORing output signals respectively from the switches and feeding an output signal back to an input terminal of the shift register. A memory stores initial settings for the shift register and open and closed states of the switches. |
