| 摘要 |
This invention relates to a fuzzy processor having an input X for at least a plurality of input variables X-i and an output U for one or more output results U-k, and including a fuzzyfication unit FU having an input coupled to the input X, a fuzzy rule processing unit RU having an input coupled to the output of the fuzzyfication unit FU, and a defuzzyfication unit DU having an input coupled to the output of the processing unit CU and an output coupled to said output U, wherein the output of the defuzzyfication unit DU is coupled to the input of the fuzzyfication unit FU and/or to the input of the processing unit RU.
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