发明名称 BARE CHIP PACKAGE, SEMICONDUCTOR CONNECTING BOARD AND SEMICONDUCTOR CHIP TESTING METHOD
摘要 PROBLEM TO BE SOLVED: To easily judge whether a bare chip is good or not. SOLUTION: A substrate 11 to be a base of a semiconductor substrate 10 has holes piercing its thickness, a conductive material 12a-12g filled in the holes, and metal bumps disposed at the top and bottom of the material 12a-12g. Metal bumps 13a-13g for connecting a bare chip 20 are provided at the top surface and connected to electrode terminals of this chip 20. On the contrary, metal bumps 14a-14g on the bottom surface are to connect the semiconductor connecting substrate 10 to a printed circuit board. Testing pads 15a, 15b are disposed on the top surface of the substrate 11 and electrically connected to corresponding metal bumps through wirings 16a, 16b.
申请公布号 JPH10242206(A) 申请公布日期 1998.09.11
申请号 JP19970040469 申请日期 1997.02.25
申请人 HOYA CORP 发明人 KAGATSUME TAKESHI
分类号 H01L21/60;(IPC1-7):H01L21/60 主分类号 H01L21/60
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