发明名称 |
MANUFACTURE FOR SEMICONDUCTOR INTEGRATED CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To improve quality of an inspection and a review in manufacturing of a semiconductor integrated circuit. SOLUTION: A lower pattern 2 is formed on a silicon substrate or an undercoat substrate 1 having several layers formed on the silicon substrate. At this time, a material absorbing a light of a wavelength used at an inspection or review is used for a layer 3 of an oxide film or the like to be formed on the substrate so as not to pass the light of the wavelength of the inspection or review. |
申请公布号 |
JPH10242023(A) |
申请公布日期 |
1998.09.11 |
申请号 |
JP19970041874 |
申请日期 |
1997.02.26 |
申请人 |
HITACHI LTD |
发明人 |
SHIBA MASATAKA;SHIMODA ATSUSHI |
分类号 |
G01N21/84;H01L21/027;H01L21/66;(IPC1-7):H01L21/027 |
主分类号 |
G01N21/84 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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