发明名称 Input buffer circuit
摘要 An input buffer circuit for receiving digital data signals from a transmission line includes a monitor section for monitoring data signals at the input of the buffer circuit. A power control section receives a control signal from the monitor section depending on whether the data is detected at the input of the input buffer circuit. The power control section can switch the input buffer into a low power standby mode or into an operating mode depending on whether a data signal transmitted via the transmission line is available at the input of the monitor section.
申请公布号 AU6721898(A) 申请公布日期 1998.09.09
申请号 AU19980067218 申请日期 1998.02.19
申请人 TELEFONAKTIEBOLAGET LM ERICSSON (PUBL) 发明人 MATS HEDBERG
分类号 H03K19/0175;H03K19/00;H04L25/02 主分类号 H03K19/0175
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