| 摘要 |
<p>PROBLEM TO BE SOLVED: To use a buffer with a comparatively small capacity for aborted cells and a large delay given to asynchronous transfer mode(ATM) cells. SOLUTION: A multiplexed output clock from a multiplexer circuit 11 is frequency-divided by 1/80 (23), a frequency division output is counted by a 256-adic ring counter 24, each count stage output is fed to a signal processing circuit (CODEC) CD1-CD256 as an output command via switches SW1-SW256 and the multiplexer circuit 11 applies time division multiplex processing to the outputs of the CD1-CD256. The SW1-SW256 are selectively switched on so that the interval of multiplexed outputs is almost set equal depending on number of channels (n) in use, a line selection circuit 21 is controlled for the CODEC receiving the output command to select and connect channels ch1-ch256 in use for and to the CODEC. The multiplexed output is converted into ATM cells.</p> |
