发明名称 Digital camera
摘要 <p>A digital camera includes a CPU. The CPU releases a bus according to a bus-release request from a memory control circuit, and supplies a bus grant signal to the memory control circuit. Accordingly, the image data from a first signal processing circuit is written into a VRAM according to DMA. When the writing of the image is ended, the memory control circuit cancels the bus release request. The CPU accesses to the VRAM through the bus, to utilize the VRAM as a working memory. &lt;IMAGE&gt;</p>
申请公布号 EP0862322(A2) 申请公布日期 1998.09.02
申请号 EP19980103384 申请日期 1998.02.26
申请人 SANYO ELECTRIC CO., LTD. 发明人 KOBAYASHI, AKIO
分类号 H04N1/21;H04N5/232;H04N5/335;(IPC1-7):H04N5/225 主分类号 H04N1/21
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