发明名称 NONVOLATILE SEMICONDUCTOR STORAGE AND READ-OUT METHOD
摘要 <p>PROBLEM TO BE SOLVED: To shorten a read-out time and to reduce power consumption by successively reading out while changing a word line read-out level from a low side to a high side, holding this read-out data to a latch and selectively performing bit line precharge in next read-out operation based on these hold data. SOLUTION: All bit lines BL of a selection side mat are precharged to prescribed potential prior to read-out. In a step 2, the data read out to a sense latch SL to be held are transferred to a data latch DL through the bit line BL of a non-selection side mat. Then, in the step 3, first, the bit line BL in the selection side mat is precharged using the data held in the sense latch SL. Thus, the bit line connected to the sense latch holding the data '0' isn't precharged, and power consumption is reduced by such amount.</p>
申请公布号 JPH10233096(A) 申请公布日期 1998.09.02
申请号 JP19970346521 申请日期 1997.12.16
申请人 HITACHI LTD;HITACHI VLSI ENG CORP;HITACHI DEVICE ENG CO LTD 发明人 SATO HIROSHI;KUBONO SHIYOUJI;HARADA TOSHINORI;KAWAHARA TAKAYUKI;MIYAMOTO NAOKI
分类号 G11C16/06;G11C16/02;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):G11C16/02;H01L21/824 主分类号 G11C16/06
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