Method of self-parallelizing and self-parallelizing multiprocessor using the method

摘要

An apparatus and method for self-parallelizing and executing a sequence of instructions. During a first mode of operation, instructions are executed concurrently with the parallelizing of instructions sequences not already parallelized. During a second mode of operation, instruction sequences already parallelized during the first mode are executed in parallel asynchronously by separate processors. The separate processors share a common register file. The processing elements rename the registers used by the instructions that modify registers so when instructions are executed in parallel the result of the executions appear in the common set of registers accessible to all the processing elements. There is no need to send and receive obligation to resolve register set/use requirements implied by the sequential execution sequence.