发明名称 Verfahren und Schaltung zur Messung der Grenzschicht-Temperatur eines Halbleiterbauteils
摘要 <p>A polysilicon (10) is integrated into an MOS-gated power semiconductor, and an integrated circuit is employed to sense the junction temperature of the power semiconductor device. To compensate for process variations in the manufacture of the polysilicon resistor, the integrated circuit (20) is self-trimming to adapt to the resistor (10). The circuit determines the optimum current to match the respective room temperature resistance of the polysilicon resistor, and stores a related value. The temperature of the power semiconductor device is measured by generating a constant current through the resistor that has a magnitude proportional to the stored value. Overtemperature protection may also be provided. To adapt the resistance (10), at initial use of the semiconductor, counter 22 is enabled and controls current mirror 23 to send a step-rise increasing current through sense resistor (10). When the voltage across the resistor reaches a predetermined value (0.87 V bg ), comparator 35 disables the counter and its state is read into EEPROM 31. This self-trimming causes a measurement current which ensures that at the critical temperature e.g. 170‹C, the voltage across sense resistor (10) causes comparator 36 to output a signal.</p>
申请公布号 DE19805734(A1) 申请公布日期 1998.08.20
申请号 DE1998105734 申请日期 1998.02.12
申请人 INTERNATIONAL RECTIFIER CORP., EL SEGUNDO, CALIF., US 发明人 NADD, BRUNO C., PUYVERT, FR
分类号 G01K7/01;G01K7/00;G01K7/16;G01K7/21;G01K7/22;G01R31/26;H01L21/66;H01L21/822;H01L23/34;H01L23/495;H01L27/04;H03K17/082;(IPC1-7):G01K7/16;H01L23/58;G01K15/00 主分类号 G01K7/01
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