发明名称 MULTIPROCESSOR DEVICE
摘要 PROBLEM TO BE SOLVED: To reduce the overhead of communication cost due to a conflict of a communication between processors when execution is carried out by mapping a linear processor array onto a two-dimensional processor array. SOLUTION: When a processor array having a torous connection of processor elements(PE) in two dimensions has linear processor array constitution PE[I, J] denotes a K(=I×N+(I+J)modN)th PE in the linear processor array, and the communication part of the PE when communicating with a (K+1)th PE communicates with PE[(I+1)modN, J] on condition that K+1 is a multiple of N and communicates with PE(I, (J+1)modN] in other cases, and the communication part when communicating with a (K-1)th PE communicates with PE[(I-1)modN, j] on condition that K is a multiple of N and communicates with PE[I, (J-1)modNJ] in other cases.
申请公布号 JPH10207852(A) 申请公布日期 1998.08.07
申请号 JP19970009354 申请日期 1997.01.22
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 WAKAYA AKIYOSHI
分类号 G06F15/16;G06F15/163;G06F15/80 主分类号 G06F15/16
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