| 摘要 |
PROBLEM TO BE SOLVED: To reduce a test time. SOLUTION: In a normal mode, a step-up voltage Vpp is applied to a selected word line WL1. On the other hand, a power supply voltage Vcc lower than the Vpp level is applied to the selected word line WL1 in a test mode. In the test mode, therefore, the level of a 'high' data written in a memory cell 25 in the test mode is lower than the level of a 'high' data written in the memory cell 25 in the normal mode. As a result, a time during which H→L error is produced can be reduced and a test time can be reduced.
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