发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT, METHOD OF DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, AND METHOD OF MANUFACTURING THE SAME
摘要 PROBLEM TO BE SOLVED: To enable a wiring layer and basic cells to be separately set narrow in pitch independently of each other by a method wherein the pitch of first contact holes which is in direct contact with the source.drain region of a MOSFET is set different from that of second contact holes which is in direct contact with a wiring layer. SOLUTION: A design is carried out as follows. Relay contacts 5 are arranged at a previously determined first narrow pitch in a basic cell, and first metal wiring layers 6 above the basic cell are disposed on prescribed grids at a second wider pitch than the first pitch. A relay wiring 4 is formed at a position so as to overlap with the relay contacts 5, and a second contact hole 3 is made assuming the relay wiring 4 as a virtual source.drain region and connected to the first wiring layer. By this setup, the pitch of metal wiring layers is separately selected independently of the intrinsic pitch of basic cells, and thus an ADIC-IC can be designed.
申请公布号 JPH10189600(A) 申请公布日期 1998.07.21
申请号 JP19960345720 申请日期 1996.12.25
申请人 TOSHIBA CORP 发明人 MIMOTO KENICHIRO;HOJO TAKEHIKO;MARUZUMI MOTOHIRO
分类号 H01L21/3205;H01L21/768;H01L21/82;H01L21/8234;H01L23/52;H01L27/088;H01L27/118;(IPC1-7):H01L21/320;H01L21/823 主分类号 H01L21/3205
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