发明名称 RECEIVING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a receiving circuit whereby superior reception signal strength stability is obtained. SOLUTION: The circuit is provided with a first antenna 1 and the second antenna 2 and also provided with means 10 and 11 generating a sum signal or a difference signal from two-groups of signals which are received by the respective antennas, the means 12 executing delay in one of the outputs of the sum signal or difference signal generating means 10 and 11, the means adding and synthesizing the output of the delay means 12 to and with the signal of a group without delay, a desired wave pass filter means 14 receiving the output of the adding and synthesizing means 13, a dividing means receiving the output of the desired wave pass filter means 14, orthogonal detection means 16-19 receiving the output of the dividing means 15 and filter means 20 and 21 receiving the outputs of the orthogonal detection means 16-19 and extracting a baseband signal. Then, a reception system after the adding and synthesizing means 13 is made to be one group so that miniaturization and low power consumption are attained.
申请公布号 JPH10190538(A) 申请公布日期 1998.07.21
申请号 JP19960356748 申请日期 1996.12.27
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 OTA GENICHIRO;IGAI KAZUNORI;SASAKI FUJIO;SUDO HIROAKI
分类号 H04B1/12;H04B1/16;H04B7/08 主分类号 H04B1/12
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