| 摘要 |
A method and apparatus for performing an add-masked byte operation on a word of digital data comprises a register for receiving the word, a register for receiving a mask byte, and a multiplication module for receiving inputs from the registers. A multiplier multiplies each byte in the word by a corresponding bit in the mask byte to obtain a series of partial products. A multiplexer shifts the partial products until the partial products are disposed in the same register location as the location of the partial product achieved with the least significant byte in the word. An arithmetic logic unit clears certain bits in the partial products and adds the partial products to obtain a sum. The use of an existing multiplier module in an image processing system eliminates the costs involved in providing additional hardware for performing an add-masked byte operation.
|
