发明名称 Non-contiguous memory location addressing scheme
摘要 A processing system and method is disclosed to access non-contiguous memory locations within a memory block. An address is generated that has a first group of bits and a second group of bits. The first group is decoded to select one of a number of memory blocks. The second group has n bits configured to select any one of (2n-(n+1)) unique combinations of the locations within the selected block. This second group provides a different pattern corresponding to each different combination of the locations within the selected block. An application of this addressing scheme for video graphics processing is also disclosed.
申请公布号 US5774135(A) 申请公布日期 1998.06.30
申请号 US19960743992 申请日期 1996.11.05
申请人 VLSI, TECHNOLOGY, INC. 发明人 LETHAM, LAWRENCE
分类号 G06F12/04;G09G5/39;G09G5/42;(IPC1-7):G06F12/06 主分类号 G06F12/04
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