Frequency doubler for an optical transceiver clock recovery circuit

摘要

A clock recovery circuit is disclosed for recovering the data of a non-return to zero signal received at an optical transceiver. The clock recovery circuit includes an active element mixer for doubling the frequency of the received non-return to zero encoded digital signal. The mixer includes a delay element for delaying the received non-return to zero signal and an exclusive-OR circuit for exclusive-ORing the delayed and received non-return to zero signals. A SAW filter is also provided for recovering a clock from the frequency doubled signal outputted by the mixer.