发明名称 METHOD AND APPARATUS FOR SUPPORTING POWER CONSERVATION OPERATION MODES
摘要 An apparatus for managing power in an electronic device that receives the power from a bus is described. The apparatus comprises a clock enable circuit that disables a clock (430) that generates nominal clock frequencies derived from raw frequencies output by an oscillator upon receiving a first signal. A time-wise independent time reference circuit (420) is coupled to the clock enable circuit (430). The time-wise independent time reference circuit (420) sends the first signal to the clock enable circuit (430) a first predetermined period of time after receiving a signal to enter into a suspend state.
申请公布号 WO9827482(A1) 申请公布日期 1998.06.25
申请号 WO1997US21246 申请日期 1997.11.18
申请人 INTEL CORPORATION 发明人 JACKSON, DAVID, R.;CROSS, LEONARD, W.;JACOBS, ROBERT, A.;OZTASKIN, ALI, S.
分类号 G06F1/04;G06F1/08;G06F1/32;G06F13/38;(IPC1-7):G06F1/32 主分类号 G06F1/04
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