发明名称 Method of manufacturing a gate electrode
摘要 In an integrated circuit, gate electrode stack of which is subjected to self-alignment processes, the sheet resistance is lowered by including a tungsten layer 15. The tungsten layer 14 is protected by a sidewall material 21 of SiNx or SiO2 after an etching step which did not extend to the substrate 11. During a subsequent etching step in which the stack extends to the substrate 11, the sidewall material 31 acts as a hard mask protecting the upper portion of the stack. After the lower portion of the stack is protected by a re-oxidation layer 42, the entire stack can be processed further without deterioration of the sheet resistance of the tungsten layer 15. <IMAGE>
申请公布号 EP0849777(A2) 申请公布日期 1998.06.24
申请号 EP19970310343 申请日期 1997.12.19
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 HSU, WEI-YUNG;ANDERSON, DIRK N.;KRAFT, ROBERT
分类号 H01L29/78;H01L21/28;H01L21/285;H01L21/336;H01L21/8238;H01L27/092;H01L29/49 主分类号 H01L29/78
代理机构 代理人
主权项
地址