发明名称 |
Process for detecting the presence of a passivation over an integrated circuit |
摘要 |
<p>The detection circuit has a pulse generator, which has a counter incrementing the pulse length of each pulse sent out. The pulse (Se) is applied to the integrated circuit via a snake shaped metallising line (2). The line forms a pass band filter with the passivation layer, and thus the short pulses are not received at the receiver (Sd) whilst longer pulses are. A correctly passivated integrated circuit can thus be determined from a tolerance threshold around the critical cut off pulse lengths.</p> |
申请公布号 |
EP0771030(B1) |
申请公布日期 |
1998.06.24 |
申请号 |
EP19960402271 |
申请日期 |
1996.10.24 |
申请人 |
STMICROELECTRONICS S.A. |
发明人 |
WUIDART, SYLVIE;SOURGEN, LAURENT |
分类号 |
H01L21/66;H01L21/82;H01L23/58;(IPC1-7):H01L23/58 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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