| 摘要 |
<p>1336480 Semi-conductor devices PHILIPS ELECTRONIC & ASSOCIATED INDUSTRIES Ltd 19 April 1971 [5 Feb 1970] 20877/71 Heading H1K A semi-conductor device is fabricated from a low ohmic silicon substrate disc with 100 planer surface doped with A s to n conductivity and formed with high ohmic layer 3 of p conductivity silicon with recesses therein. A further layer 2 of N conductivity Si is deposited therein by thermal epitaxial decomposition of silane containing pH or by epitaxial deposition followed by vapour deposited polycrystal. The substrate is selectively etched electrochemically down to the interface of the p-conductivity layer, which is further etched by HF + HNO 3 + CH 3 COOH to a plane intersecting the recess to leave a body (Fig. 3) comprising n-type layer 6 with p-type inserts 39. A complementary MOS transistor structure (Fig. 4) comprises p-type source regions 31, 35; p-type drain regions 32, 36; n-type source and drain regions in p-type insert 39; insulant oxide layers 37 and gate insulant oxide layers 38, 40, 42 overlain by gate electrodes 44, 41, 43. In a modification (Fig. 6, not shown) an n-type impurity is diffused after recessing and before epitaxial deposition of ptype layer. After removal of substrate and part of the high ohmic layer, a p-type base insert is separated from a p-type layer by a n-type diffused collector zone and a n + emitter region is diffused into the insert. In a modification, a low ohmic n+ substrate is formed with a recessed high ohmie n-type layer 72, with an oxide layer on its elevated surface, and p-type silicon is deposited epitaxially in the recesses and as polycrystal on the oxide layer, (Figs. 7, 8, not shown), and the substrate and a portion of the high ohmic layer are etched off to leave a structure (Fig. 9) wherein n-type and p-type source and drain regions 91, 92; 93, 94 are diffused into monocrystalline p + type layer 81.</p> |
