发明名称 Method and apparatus for automatic pixel clock phase and frequency correction in analog to digital video signal conversion
摘要 A method for producing a digital video signal from an analog video signal, the analog video signal including an analog video data signal that is raster scanned in lines across a CRT screen to form consecutive frames of video information, the raster scanning controlled by use of a horizontal synchronizing signal (Hsync) that controls a line scan rate, and a vertical synchronizing signal (Vsync) that controls a frame refresh rate, to produce consecutive frames of video information, wherein the digital video signal is produced by generating a pixel clock signal with pixel clocks for repetitively sampling instantaneous values of the analog video data signal, and digitizing the analog video data signal based on the pixel clock sampling. An expected width E, measured in number of pixel clocks, of a video image producible by the analog video signal is estimated, and an actual width W, measured in number of pixel clocks, of the video image producible by the analog video signal is calculated. The actual width W is compared with the expected width E. When E does not equal W, at least one of a frequency component and a phase component of the pixel clock signal is adjusted until E equals W. The phase of the pixel clock signal may also be corrected by selecting a selected pixel component, and iteratively adjusting the pixel clock phase until a jitter zone of a pixel clock pulse is centrally registered with the selected pixel component.
申请公布号 US5767916(A) 申请公布日期 1998.06.16
申请号 US19960760517 申请日期 1996.12.05
申请人 IN FOCUS SYSTEMS, INC. 发明人 WEST, MICHAEL G.
分类号 G09G3/20;G09G5/00;G09G5/08;G09G5/18;H04N5/12;H04N5/46;H04N5/74;(IPC1-7):H04N5/12 主分类号 G09G3/20
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