发明名称 Layered circuit-board designing method and layered circuit-board
摘要 A layered circuit-board designing method and layered circuit-board where circuit-boards to be overlaid are connected at the center or an arbitrary position of each circuit-board. The layered circuit-board includes an upper-layer first circuit-board, a lower-layer third circuit-board, and an intermediate-layer second circuit-board between the first and third circuit-boards. A first connector is mounted on the first circuit-board, a second connector is mounted on the third circuit-board, a third connector is mounted on the top surface of the second circuit-board, while maintaining the positional relation between the third connector and the first connector, and a fourth connector is mounted on the bottom surface of the second circuit-board, while maintaining the positional relation between the fourth connector and the second connector. In addition, through holes are provided at pins of the third and fourth connectors for passing through the front and bottom surfaces of the second circuit-board.
申请公布号 US5768106(A) 申请公布日期 1998.06.16
申请号 US19960661473 申请日期 1996.06.11
申请人 CANON KABUSHIKI KAISHA 发明人 ICHIMURA, AKIRA
分类号 H01R12/16;H05K1/14;H05K3/46;(IPC1-7):H05K1/14 主分类号 H01R12/16
代理机构 代理人
主权项
地址