发明名称 Address generating circuit for generating addresses separated by a prescribed step value in circular addressing
摘要 An address generating circuit of simple configuration for circular addressing. A bit isolating circuit 304 extracts an index from an input address. When a step value input to an adder 302 is positive, an index generating circuit subtracts the sum of the index and step value from a block size of a memory region. Depending on the subtraction result, an output which is either the sum of the index and step value or the subtraction result is provided as a new index. When the step value is negative, the index and step value are added. Depending on the addition result, an output which is either the sum of the index, step value, and capacity of the memory region or the addition result is provided as a new index. A bit multiplexer 314 generates the next address from the new index and an address.
申请公布号 US5765218(A) 申请公布日期 1998.06.09
申请号 US19950402224 申请日期 1995.03.10
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 OZAWA, YUJI;ABIKO, SHIGESHI;BOUTAUD, FREDERIC
分类号 G06F9/34;G06F5/10;G06F9/345;G06F9/355;G06F12/02;(IPC1-7):G06F12/02 主分类号 G06F9/34
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