| 摘要 |
The transistor comprises a semiconductor substrate 1 of first conductivity type, an element isolation region 2 on the semiconductor substrate, an impurity diffusion layer 6 of second conductivity type, and a CVD silicon oxide insulating film 8 over the element isolation region and the impurity diffusion layer. A thermal silicon oxide insulating film 7 is formed between the impurity diffusion layer 6 and the CVD silicon oxide insulating film 8 to prevent current leakage between the CVD silicon oxide insulating film and the impurity diffusion layer. The transistor may be connected to a capacitor to form a DRAM cell. |
