| 摘要 |
The present invention relates to a method of manufacturing a large-scale-integration circuit device, comprising: the steps of generating (59) logic library data with respect to a macro comprising a macro core having a predetermined function and boundary cells positioned near input and output terminals thereof, the logic library data including delay characteristic data of the boundary cells given as attribute data to the input and output terminals; designing (51) a logic circuit having at least a plurality of cells and the macro, the cells being connected to the macro core through the boundary cells connected to the input and output terminals; calculating (52) a delay time of the macro based on the delay characteristic data with respect to the designed logic circuit; and effecting a logic simulation (57) on the designed logic circuit based on the calculated delay time. <IMAGE> |
