发明名称 FIFO memory system determining full empty using predetermined address segments and method for controlling same
摘要 A structure and method for determining whether a first in, first out (FIFO) memory is empty or full when the read address of the memory equals the write address of the memory. The read and write addresses are individually incremented, each in a predetermined circular sequence. The circular sequence is divided at least three segments. Portions of the read and write addresses are encoded to indicate the segments in which the read and write addresses are located. These encoded address portions are decoded to determine the relative segment positions of the read and write addresses. If the read address is in the segment prior to the write address, a DIRECTION signal is set to a first state. If the write address is in the segment prior to the read address, the DIRECTION signal is set to a second state. When the read address equals the write address, the state of the DIRECTION signal is used to determine whether the memory is empty or full. If the DIRECTION signal is in the first state, the memory is empty. If the DIRECTION signal is in the second state, the memory is full.
申请公布号 US5758192(A) 申请公布日期 1998.05.26
申请号 US19950541860 申请日期 1995.10.10
申请人 XILINX, INC. 发明人 ALFKE, PETER H.
分类号 G06F5/10;G06F5/14;G06F13/16;(IPC1-7):G06F13/20 主分类号 G06F5/10
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