Data multiplexing system having at least one low-speed interface circuit connected to a bus

摘要

A data multiplexing system which includes a plurality of data multiplexing buses through which a plurality of low-speed digital signals are collected into, and distributed from, a multiplexer/demultiplxer. In a data multiplexing mode, the low-speed digital signals entered from a plurality of low-speed transmission lines have their signal format converted by respectively corresponding low-speed interface circuits, and the resulting signals are multiplexed in time slots designated within a multiplexed signal of primary level on the up bus line of the corresponding data multiplexing bus. The high-speed multiplexer multiplexes the collected signals up to a predetermined signal level and sends the resulting secondary multiplexed signal to a high-speed interface module having a high-speed transmission line interface. The high-speed interface module converts the received secondary multiplexed signal and sends the resulting signal to the high-speed transmission line. The signal of the high-speed transmission line is processed by the high-speed interface module and the high-speed demultiplexer, and the low-speed digital signals are sent to the low-speed transmission lines.