Embedded ROM with RAM valid bits for fetching ROM-code updates from external memory

摘要

An embedded ROM has a column of static RAM cells attached to the end of the row lines. When a row of ROM cells is activated by the row line, a RAM cell is also activated by the row line. The RAM cell indicates if the data in the selected row's ROM cells is valid. When the RAM cell indicates that the ROM data is not valid, external memory is read to obtain a patched instruction and the ROM data is ignored. The ROM's base address is translated to a base address in external memory of patch code. The ROM's offset address is used as the offset into the patch-code region of external memory. Thus address translation is minimal as the offset is not translated. A single ROM instruction can be updated by a single patch instruction in external memory, providing fine granularity of code updates. Longer update routines can be located in a patch-code overflow region of external memory. The updated instruction at the ROM's offset in the patch-code region can be a jump instruction to the longer update routine in the overflow region. Thus both single and multiple-instruction patches are possible./!