Multi-stage multiplexer arrangement, e.g. barrel shifter

摘要

The arrangement (MA) comprises inputs (Ei, i = 1. n) and at least one output (Aj, j = 1. m), and is formed in such way, that at least a part of the multiplexers (Mkl) is controlled by bits of a control signal vector which comprises a pre-citable number of bits. At least a part of the bits of the control signal vector show a different time behaviour, whereby they are not simultaneously available. The control of the part of multiplexers depends on the time behaviour of the bits. The multiplexer arrangement is divided into at least two multiplexer stages, whereby each stage is respectively controlled with a corresponding bit of the control signal vector.