发明名称 Wafer-level burn-in system
摘要 <p>The present invention relates to a system and method for performing reliability screening on semi-conductor wafers and particularly to a highly planar burn in apparatus and method for uses including wafer level burn-in (WLBI), diced die burn-in (DDBI), and packaged die burn-in (PDBI). The burn-in system includes a burn-in substrate with a planar base. a temporary Z-axis connecting member, and a Z-axis wafer level contact sheet electrically coupled to one another for screening wafers, diced die, and packaged electronic components, their assembly and use.</p>
申请公布号 EP0841572(A2) 申请公布日期 1998.05.13
申请号 EP19970308888 申请日期 1997.11.05
申请人 W.L. GORE & ASSOCIATES, INC. 发明人 BUDNAITIS, JOHN J.;LEONG, JIMMY
分类号 G01R3/00;H01L21/326;H01L21/66;G01R31/26;G01R31/28;G01R1/067;G01R1/073;(IPC1-7):G01R31/316 主分类号 G01R3/00
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