| 摘要 |
Power consumption, electromigration, joule heating, and voltage supply ringing are reduced in digital integrated circuits by reducing crowbar current. In one embodiment, crowbar current in a buffer circuit (71) is reduced by electrically connecting the drain region of a PMOS transistor (73), in a first inverter, to a gate electrode (84) of an NMOS transistor (79) and a gate electrode (82) of a PMOS transistor (77), in a second inverter, through a first conductive interconnect (78). In addition, the drain region of the NMOS transistor (75) in the first inverter is electrically connected to the gate electrode (84) of the NMOS transistor (79) and to the gate electrode (82) of the PMOS transistor (77), in the second inverter, through a second conductive interconnect (80). These conductive interconnects allow crowbar current, which is created during a transition between logic states, to be reduced.
|
