Semiconductor memory e.g. high speed DRAM with data memory array

摘要

The memory comprises a data array (1) and a data bus (2, 3, 6) incorporated between data input and output fields (7) and the array for the input and output of data stored in an external component and in data to be stored. The data bus exchanges at least in data with the memory array and also exchanges at least in data with the data input and output field by time allocation during the same time interval. There are numerous memory cells in the array and the input and output field handles in data. There are two buffers (4, 5) with a data input and output bus (6) in between.