发明名称 Microprocessor for real time emulation and testing
摘要 The microprocessor 101 is coupled via a buffer 12 to a controller 2 and a host system 1 to form a real time emulator and test adapter unit 121. The microprocessor is formed as an integrated circuit on a semiconductor chip. The microprocessor has two memories, one of which 21 is used in the normal processing mode and the other 22 that is used in the test mode. Decoders 41,42 are coupled to both memories.
申请公布号 DE19721516(A1) 申请公布日期 1998.05.07
申请号 DE19971021516 申请日期 1997.05.22
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 HIGUCHI, TAKASHI, TOKIO/TOKYO, JP;OKUMURA, NAOTO, TOKIO/TOKYO, JP;TSUBOTA, HIDEO, TOKIO/TOKYO, JP
分类号 G11C11/401;G06F11/22;G06F11/267;(IPC1-7):G06F11/00 主分类号 G11C11/401
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