发明名称 METHOD AND SYSTEM FOR CONFIGURING AN ARRAY OF LOGIC DEVICES
摘要 <p>A system and method for partial reconfiguration of a gate array includes generating a design database (314) by placement and routing (312) of a logic circuit. The design database is accessed to modify (322) logic cell configurations created by the place and route operation. Based on the modifications, a partial configuration bitstream containing only bitstrings which implement the modified logic cells is created (324). The partial configuration bitstream is downloaded (326) to the gate array, thereby effectuating a partial reconfiguration of the gate array. In an alternate embodiment, a system in accordance with the present invention includes software utilities (604) which allow an application program (602) executing in a system containing a programmable gate array to reconfigure the array on-the-fly. The utilities include routines for modifying the design in response to external conditions detected during run-time. This approach obviates the need for providing a set of predetermined alternate designs, allowing the application to make that determination on its own.</p>
申请公布号 WO1998019256(A1) 申请公布日期 1998.05.07
申请号 US1997018363 申请日期 1997.10.15
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