FLOATING POINT PROCESSOR FOR THREEDIMENSIONAL GRAPHICS ACCELERATOR HAVING FLOATING POINT WRITING AND SET UP CORE

摘要

PROBLEM TO BE SOLVED: To provide performance where the defect of a former design, which is restricted by transfer speed, is improved by providing a first bus interface receiving primitive data and a second bus interface supplying output data to a bus. SOLUTION: CF buses(command/floating buses) are connected to three eight bits buses and contain nine bits forming 33 bits buses called as CD buses. The buses 154A-154C collectively contain the CD buses and they are the eight bits buses and the 11 bits buses containing three bits. The CD buses are direct single direction buses to draw blocks 172A and B from a command block 142. The CD buses borrow cycle and data lines from the CF buses 154 and speedily send data from the command block 142 to the draw blocks 172A and 172B by using data paths in three floating point blocks 152A-152C.